General Category > LisaList2
CPU Board Debugging - White Screen
sigma7:
If the timing logic looks to be working properly, then we're headed back to square 1 to investigate what is currently happening.
Suggestions:
After you press reset, does /BERR do any cycling?
If /BERR cycles:
* does it continue cycling perpetually, or stop until reset again?
* (and) disable the bus timeout and probe the 68k address lines to find out what address is causing the first bus error after reset.
If /BERR doesn't cycle, does /AS cycle perpetually?
If /AS cycles:
* check that the EPROM output enables are cycling (U13D-22 and U14D-22)
* check /DTACK is cycling
If /AS does not cycle, check /RESET, /HALT, /BR, /BERR at the 68k.
edit for future cases: also check CLK at the 68K is about 5 MHz, as without a running clock, nothing is likely to work.
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