General Category > LisaList2
LisaEm 1.2.7-RC4 support bug reports
D.Finni:
I vote continue with Xenix-- you're clearly on a roll! :-)
rayarachelian:
Yeah, so it looks like after the write happens VIA #2, timer 1 gets fired, it causes an IRQ, and then it prints the bad state message when it sees that it's last request is completed. So either T1 shouldn't have been fired, or perhaps the emulated profile is way too fast. I'll have to write some more debug code to log where T1 is being set and for how long and what mode T1 is in and figure out whether or not it's supposed to actually fire or not.
I can't tell if it's supposed to fire or not yet, only that right before it goes into the code that checks the profile state, it looked at whether or not the Profile disk enabled line is on, and then it looked at the IFR for VIA2 saw that IFR bit 7 was on, and that the T1 fired bit was also on, and right after that it prints pfcmd bad state: 0306 via the printf call.
A quick hack might be to disable T1 after the last status byte is read (but reading from the port should have cleared the IRQ anyway, so that too might be the bug here.)
So not sure if it's set T1 what mode it set it in, and whether or not it should have fired, or if in Xenix it should have fired first to allow it to read the status rather than wait for BSY to flip.
(fixing this won't mean that Xenix will boot, there might be onion layers worth of bugs, or it might just be this one. Will find out soon enough.)
rayarachelian:
Far as I can tell, VIA #2 Timer 1 is NEVER set anywhere in the tracelog - all the regs stay at zero - which means it should be disabled, and the cpu clock expiration for it is -1, so it should never be fired, however the counters for it say it was fired multiple times, so there's a bug somewhere in the code that calculates timing of when this was fired, and worse, the IFR flag for it isn't cleared on read.
So for sure this is a bug in the VIA 2 timer handling code, or in irq.c
--- Code: ---1497875:via2 T1 Control: 00 Timed IRQ each time T1 Loaded, PB7 Disabled
1497904:via2 reg[4]=00 T1CL
1497905:via2 reg[5]=00 T1CH
1497906:via2 reg[6]=00 T1LL
1497907:via2 reg[7]=00 T1LH
1497931:via2 T1 cpu_68k clk expiration:ffffffffffffffff cpu68k_clocks:0000000058b2bb0b t1_fired:8 times
...
5536358:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5536421:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5538925:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5538982:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5539051:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5541541:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5541598:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5541661:VIA2 IFR: (fired IRQ's): CA1 TIMER1
5544185:VIA2 IFR: (fired IRQ's): CA1 TIMER1
--- End code ---
rayarachelian:
Yup, Xenix will be an onion of bugs, not a single layer, I fixed the IFR issue that was incorrectly tagging TIMER1 when TIMER1 was actually off, however, now it just sits at the "Entering System Maintenance" text, no shell is shown, no menu is shown, I don't think it gets far enough to run init.
D.Finni:
--- Quote from: rayarachelian on November 06, 2020, 07:45:23 pm ---Yup, Xenix will be an onion of bugs, not a single layer
--- End quote ---
Yeah, I think we were all suspecting that would be the case, but didn't want to spoil the mood. :-P
But don't worry: the cause of all bugs is down to a single 68000 instruction. You only need to find which particular instruction is at fault, take correction, and move on to the next bug! :-)
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