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 1 
 on: Yesterday at 08:35:28 pm 
Started by AlexTheCat123 - Last post by Lisa2
D'Oh! Thanks for that. That came from here: https://lisaem.sunder.net/cgi-bin/bookview2.cgi?zoom=0?page=8?book=6?Go=Go and is labeled "Lisa 1 I/O Board 4" - are the ones labeled "Lisa210Sys" swapped with the "Lisa1" ones?
I/O sheet four for both the 2/5 and 2/10 appear to be the same on the sunder site....

 2 
 on: Yesterday at 06:52:37 pm 
Started by AlexTheCat123 - Last post by AlexTheCat123
Quote
By Select you mean !CS on pin 8 of the two SRAMs, yes?

No. I'm talking about the S signal that feeds into the three LS157 muxes that select between the shared RAM being addressed by the 68000 and the RAM being addressed by the 6504.

The /DTACK signal that comes out of the 8T97 on the schematic also seems to suffer from the same problem where it goes low for a much shorter period of time when the Lisa fails to properly access the shared RAM compared to when it succeeds.

 3 
 on: Yesterday at 06:08:51 pm 
Started by AlexTheCat123 - Last post by rayarachelian
Just to clarify, the drawing that Ray linked is actually the 2/10 I/O board with the IWM chip.
I have attached the correct drawing for the 2/5 I/O board.

D'Oh! Thanks for that. That came from here: https://lisaem.sunder.net/cgi-bin/bookview2.cgi?zoom=0?page=8?book=6?Go=Go and is labeled "Lisa 1 I/O Board 4" - are the ones labeled "Lisa210Sys" swapped with the "Lisa1" ones?

 4 
 on: Yesterday at 05:27:14 pm 
Started by AlexTheCat123 - Last post by Lisa2
Guys,
Just to clarify, the drawing that Ray linked is actually the 2/10 I/O board with the IWM chip.

I have attached the correct drawing for the 2/5 I/O board.


 5 
 on: Yesterday at 02:48:37 pm 
Started by AlexTheCat123 - Last post by rayarachelian
So I played around with the logic analyser some more and it revealed something interesting. I hooked it up to the BD0-BD7 lines as well as the address lines A1-A7 that feed into the muxes that allow the CPU to access the shared floppy RAM. I also connected it to the select signal (S) on the muxes so that I can see when they're allowing the CPU to address the floppy RAM. I then went into service mode and tried to read the I/O ROM version number from location FCC031. Interestingly, every time it successfully read the version number, the select signal went low and stayed low for around 600ns, but each time it failed the select signal only stayed low for around 100ns. You can see this behavior in the two screenshots that I've attached. What could be causing this?

Looking at: https://lisaem.sunder.net/LisaSchem/Lisa1SysIO4.gif

By Select you mean !CS on pin 8 of the two SRAMs, yes?

Could be R28 (s/b 47Ohm) or U4C LS157 pin 12 (4Y), or it's input lines 4A, 4B.  4A should go to ground, so that's easy to check.

4B goes to Y0 of U5A S139, so one of it's inputs could be the cause.

That could be the XNOR S02 gate at U8A (pin 10), A11, A12 of the 6504, but likely these aren't it as those come from the 6504 itself.

There's also some fun components in the center left of the schematic, right under the SRAMs, there's a transistor Q7 with 3 resistors going to capacitor 28.
Not sure if those can pull down the signal or mess with it, doesn't look like it, but who knows, if they're messed up in some way they might.
(R54 is acting as a pullup from the looks of it, and R26 too)

 6 
 on: Yesterday at 10:00:40 am 
Started by AlexTheCat123 - Last post by AlexTheCat123
So I played around with the logic analyser some more and it revealed something interesting. I hooked it up to the BD0-BD7 lines as well as the address lines A1-A7 that feed into the muxes that allow the CPU to access the shared floppy RAM. I also connected it to the select signal (S) on the muxes so that I can see when they're allowing the CPU to address the floppy RAM. I then went into service mode and tried to read the I/O ROM version number from location FCC031. Interestingly, every time it successfully read the version number, the select signal went low and stayed low for around 600ns, but each time it failed the select signal only stayed low for around 100ns. You can see this behavior in the two screenshots that I've attached. What could be causing this?

 7 
 on: June 15, 2021, 04:03:23 pm 
Started by AlexTheCat123 - Last post by rayarachelian
Quote
If you have a large logic analyzer it may help you debug futher
I have a USB logic analyzer, but the vast amount of data that it produces when connected to the Lisa makes it impossible to go through it all. The text and CSV files that it outputs are so large that I can't open them in any program without it crashing.

Yeah, those HP ones understand 650x and 68000 busses and can show you what the CPU is doing, what address it accesses, read/write and value and timing.
With a USB one, you'd need specialized software to analyze it.

 8 
 on: June 15, 2021, 01:27:09 pm 
Started by AlexTheCat123 - Last post by AlexTheCat123
I just wrote a simple Arduino program that will test these RAM chips by writing every possible value to each address and then reading the value back and both chips passed just fine. I guess this means that it's a bus issue, which will not be very fun to troubleshoot :(.

Quote
If you have a large logic analyzer it may help you debug futher
I have a USB logic analyzer, but the vast amount of data that it produces when connected to the Lisa makes it impossible to go through it all. The text and CSV files that it outputs are so large that I can't open them in any program without it crashing.

 9 
 on: June 15, 2021, 12:01:49 pm 
Started by AlexTheCat123 - Last post by rayarachelian
The 6504 finally came in the mail and after putting it in, the floppy controller seems to be working slightly more than it was before, but it's definitely still broken. I don't get the error 57 anymore and the I/O ROM version is no longer FF, but the version is only reported as A8 every five or six times that I look at its memory address in service mode. Other times, it's seemingly random values. Sometimes, the Lisa lists two floppy drives in the Startup From... menu and other times it just lists one, so clearly something isn't right. It sometimes just hangs and sometimes gives error 39 (drive ROM can't keep up) when I try to boot from the floppy drive and BLU always gives floppy errors whenever I start it up. What should I try next?

So either there's something wrong between the I/O board bus pins and the CPU board (i.e. motherboard connector) or the SRAM on the floppy controller is broken.

On initialization, the 6504 will write it's version to the shared SRAM. It will do this only once.

So if that value fluctuates, something is wrong either at the bus level (and we've seen this before with your Lisa) or at the SRAM level.
You can swap out the SRAM to be able to tell which.

One thing you could look at is to see the values that show up that are not A8 and map those in binary. This will tell you which bits are either broken in the SRAM or on the bus.

Another thing you could do is piggy back a second identical SRAM chip on top of the existing one. If the problem goes away that might indicate the SRAM.
However, if the existing SRAM is bad and reports "1" values where it should be "0", the 2nd SRAM will not help.

There's a tiny bit of danger to this since you're connecting two outputs together, but it's very small. Worst case you'll cause the new SRAM to burn out as well, but I don't think these are so expensive that it matters that much.

If the randomness issue doesn't go away, it's still either the SRAM or the bus.

If you have a large logic analyzer it may help you debug futher. i.e. the old Agilent/HP ones that you could interface directly to a chip. @Sigma7 introduced me to these early on in the days of LisaEm, but it turned out I didn't need to break out this big gun to work on LisaEm, and indeed I needed very little actual testing on a real Lisa in 99.999% of cases. So I'm not very well versed in how to use such test equipment. However, in this case, if you own one and have it handy it could immediately help you diagnose the issue.

All this said, the amount of time it will take you to diagnose, it might just be quicker to desolder to SRAM, solder in a socket, and then insert a new SRAM. If the problem goes away, you're done in ~30 mins. If it doesn't, you know exactly where to look next. (Well maybe some lines from the area on the I/O board where the SRAM and the logic gates that enable it to be visible to the 68000 - DISKDIAG?, to the fingers on the I/O board, to the motherboard connector, to the traces on the motherboard, to the CPU board connector, to the CPU board itself.



 10 
 on: June 15, 2021, 11:06:21 am 
Started by AlexTheCat123 - Last post by AlexTheCat123
The 6504 finally came in the mail and after putting it in, the floppy controller seems to be working slightly more than it was before, but it's definitely still broken. I don't get the error 57 anymore and the I/O ROM version is no longer FF, but the version is only reported as A8 every five or six times that I look at its memory address in service mode. Other times, it's seemingly random values. Sometimes, the Lisa lists two floppy drives in the Startup From... menu and other times it just lists one, so clearly something isn't right. It sometimes just hangs and sometimes gives error 39 (drive ROM can't keep up) when I try to boot from the floppy drive and BLU always gives floppy errors whenever I start it up. What should I try next?

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