It's been a while since I've read that part of the hardware manual, but I thought the Lisa MMU topped out at 2 MiB? See the figure on Page 36: "physical address (21 bits)".
(Does this mean that your hack gives the Lisa in LisaEm an enhanced MMU? )
Nah, see:
https://lisalist2.com/index.php/topic,29.0.html - James MacPhail documented this for us and all the details are in there, which probably doesn't matter much for the purposes of emulation (unless ofc I run into issues that I'd need to refer to schematics for). MacWorks can handle a 4MB board - either through this mod, or via the XLerator. This is kinda a hack. I don't believe the MMU itself gets modified, but perhaps bypassed such that the CPU can see the extra 2MB of RAM. So this would be a special hack just for MacWorks.
This is what I saw MacWorks XL 3.0 do very early on, note the 20001c address, and it sets the bus error vector to just a few opcodes right after the TST, skipping over just a few bytes. (This is very similar to what UniPlus does for the 68010 test.)
1/0002001c (0 0/0/0) : 4ab9 0040 0000 : J..... : 714 : TST.L $00400000 SRC:clk:000000003028ac47 +20 clks
reg68k.c:reg68k_internal_vector:2169:Entering: internal_vector - VECTOR:2 (0x2 (2) bus error), addr_err:00400000 oldpc:0002001c, pc24:0002001c, reg68k_pc:0002001c| 18:11:50.6 807971911
irqdoneD 0:00000000 1:00000008 2:01200000 3:0000000a 4:00000003 5:00000073 6:00000010 7:30000000 .S..... imsk:7 pnd: (0/0/normal cx:1)SRC:
irqdoneA 0:00020028 1:00fe1f5e 2:00000008 3:00fe1f5e 4:00fcd901 5:00007ff8 6:0017b3be 7:00020000 SP:00000000 PC:0002001c SRC:
reg68k.c:reg68k_internal_vector:2260:PUSH PC 0002001e context:1| 18:11:50.6 807971911
reg68k.c:reg68k_internal_vector:2266:PUSH SR 2700 context:1| 18:11:50.6 807971911
reg68k.c:reg68k_internal_vector:2282:BUS_OR_ADDR: ADDR error:2 at PC:0002001e pc24:0002001c addr:00400000 clk:000000003028ad2f - pushing extended exception frame for 68000| 18:11:50.6 807972143
reg68k.c:reg68k_internal_vector:2285:PUSH IR:4ab9 context:1| 18:11:50.6 807972143
reg68k.c:reg68k_internal_vector:2286:PUSH AE:00400000 context:1| 18:11:50.6 807972143
reg68k.c:reg68k_internal_vector:2287:PUSH BF:0015 context:1| 18:11:50.6 807972143
reg68k.c:reg68k_internal_vector:2325:SRC: VECTOR IRQ: 0x2 (2) bus error oldpc:0002001e -> newpc:00020028 A7=0001fff2 SP=00000000 Mode pre-IRQ:Supervisor
| 18:11:50.6 807972143
reg68k.c:reg68k_internal_vector:2343:Done with vector fn. regs.pc=00020028 reg68k_pc:00020028| 18:11:50.6 807972143
src/lisa/cpu_board/memory.c:dmem68k_fetch_long:476::::::READ LONG 00000000 ' ' from @1/00400000 (phys @fffffffe) using 20-bad_page| 18:11:50.6 807972143
src/lisa/cpu_board/memory.c:dmem68k_fetch_long:479::::::GOT ABORT_OPCODE! READ LONG 00000000 ' ' from @1/00400000 (@00400000)| 18:11:50.6 807972143
cpu68k-4.c:cpu_op_714a:9863:ABORTING OPCODE AT 00020028 abort_opcode=1| 18:11:50.6 807972143
D 0:00000000 1:00000008 2:01200000 3:0000000a 4:00000003 5:00000073 6:00000010 7:30000000 .S..... imsk:7 pnd: (0/0/normal cx:1)SRC:
A 0:00020028 1:00fe1f5e 2:00000008 3:00fe1f5e 4:00fcd901 5:00007ff8 6:0017b3be 7:0001fff2 SP:00000000 PC:00020028 SRC:
In terms of Preferences UI, I plan to add a checkbox under the memory size selection radio buttons, something like this "[X] 4MB MacWorks Hack"
I will need to redo some of the MMU internals in LisaEm to make it work and remove/disable some of the address checks, and also call realloc on the lisaram array to 4MB, but those are LisaEm implementation details more than anything else.
The trick is to simulate enough of what happens on a real Lisa to get MacWorks to be happy with it.
Likely I'll need to tweak the min/max RAM addresses written to by the ROM (or maybe not).