Re: lisa 2 startup problems

Hi James,

Thank you for your help, I see you are a Lisa Guru. I am just as old as the Lisa and my assembler skills are somehow limited, I grew up with basic already so assembler has never been to attractive to me.

So I understand what Error 41 stands for and it should appear at this moment because a lot of components from the memory and address bus are already removed.

I have one more question, in theory would the Lisa CPU Board start without IO Board, given the PSU is strapped to run? I am looking at a strange symptom and I don't know how this is related to the IO Board.

How is the video signal/circuit influenced by the IO board? even if the cpu boards starts and gives the error 41, the image on the monitor is still not right, the while lines are present and the top while bar is not in a "very good" shape, this was the first symptom and I thought there must be something wrong with the data or address bus, but now the data and address bus lines on the IO Board are "disconnected" from the rest of the components. I can also notice a "slow" refresh of the white box with the cpu error at about 1 Hz, this I can also not explain.

thank you!

duminică, 13 ianuarie 2013, 07:46:10 UTC+2, James MacPhail a scris:
>
>
> >error code 41, what does it really mean "selection logic problem" ?
> >Is there anywhere some description about the selection logic?
>
> Most of the error codes are not very well explained, but one can
> examine the ROM listing to get an idea of what causes a particular
> error code.
>
> The ROM listing is available from a few sites, one being:
>
> http://www.1000bit.it/support/manuali/apple/lisa/lisaBOOTROMLISTING.pdf
>
> Looking in the section labelled "Equates for error codes displayed to
> user", one can see that the symbol name ECPUSEL is assigned the value
> for error 41.
>
> A search of the listing for ECPUSEL show it appears at $13DE, and
> looking at the surrounding code, this is a result of the "CPUSEL" bit
> having been set in D7 (which happens to be used as an error
> "accumulator" during the self-test).
>
> A search for CPUSEL reveals that the CPUSEL bit is set in the code
> preceding $0B8E in the listing. It appears this is generated when an
> test access of VIA1 (6522) fails with a bus error (a bus error occurs
> when nothing responds to an address by asserting DTACK or VPA, and
> the CPU gives up waiting). If the I/O Board is missing some parts in
> the circuitry that generates DTACK and VPA, this is not too
> surprising.
>
>

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