Re: How much RAM is recognized in my Lisa?

From: James MacPhail <gg__at_email.domain.hidden>
Date: Tue, 27 Jun 2006 13:58:20 -0700

[Looking at values in low memory using service mode...]

>Do you know what the other data means?

I expect that, in most cases, the low memory variables are wiped out and the space re-defined by the operating system.

If you want assembler level details, such as how these are used, there is a well commented listing of the Lisa Boot ROM source code on the internet, such as at (Thanks to the new LisaFAQ for pointing me to this site!):


I found the following summary in a paper by David T. Craig (Lisa Historian Extraordinaire) at


OUTPUTS: Saves various results and contents of system registers in memory for examination by system programs or with the ROM monitor.

$180-183 : Power-up status (x0000000 = ok)
$184-185 : Memory sizing error results
$186-1A5 : Results of memory read/write tests
$1A6-1A9 : Parity error memory address (if error during mem test)
$1AA-1AB : Memory error address latch
$1AC-1AF : D7 save on exception errors
$1B0-1B1 : Results of MMU tests (context/data bits)
$1B2 : Keyboard ID (00 = no ID received)
$1B3 : Boot device ID
$1B4-1B9 : Boot failure data
$1BA-1BF : Clock setting (Ey,dd,dh,hm,ms,st)
$1C0-1DF : Data reg save area (D0 - D7)
$1E0-1FF : Address reg save area (A0 - A7, A7 = USP)
$240-260 : System serial #
$260-267 : Scratch area
$268-26B : Suspected (logical) memory error address for parity error
$26C-26F : Save of data written to suspected error address
$270-273 : Actual (logical) error address found during search
$274-277 : Save of data read during parity error search
$278-27B : (Physical) error address read from parity error address latch
$27C : Error row for parity chip failure (0 = first row, 7 = last row)
$27D : Error column for parity chip failure (9 or 14)
$280-293 : Exception data save area (FC/EXCADR/IR/SR/PC/EXCTYPE/SSP)

            44 = NMI or other interrupt
            45 = bus error
            46 = address error
            47 = other exception/interrupt
            48 = illegal instruction error
            49 = line 1010 or 1111 trap
            50 = bus error accessing keyboard VIA
            51 = bus error accessing parallel port VIA
            57 = bus error accessing disk controller

$294-297 : Maximum physical memory address + 1
$298-299 : I/O slot 1 card id (0 = no card present)
$29A-29B : I/O slot 2 card id
$29C-29D : I/O slot 3 card id
$2A1 : Disk ROM id
$2A4-2A7 : Minimum physical address
$2A8-2AB : Total memory (Max-Min)
$2AC : SCC test results
$2AD : Slot # of memory board if memory error
$2AE : Result of disk controller self-test
$2AF : System type
0 = Lisa 1 1 = Lisa 2 2 = Lisa 2 with external hard disk 3 = Lisa 2 with internal hard disk

$2B0-2BF : Keyboard queue (16 bytes)
$2C0-480 : ROM scratchpad/stack area

It is a recent discovery to me that the memory test in the ROM reports failure details (see $268 - $27D above). This could be very helpful in troubleshooting memory boards, particularly those LRamBo 2MB modified Apple 512K boards. I wish I knew about that 20 years ago :-)

HTH, James

James MacPhail                   "Think not of engineering as art,
uo957_at_email.domain.hidden                 but of art as engineering"
Sigma Seven Systems Ltd.
james_at_email.domain.hidden        <>

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