LisaList2

The original XLerator design circa 1989 included:

• 16 MHz 68000
• 4 SIMM sockets
• SCSI Port (optional/extra)
• FPU Socket (optional/extra)

The SIMM sockets supported one or two pairs of 30 pin SIMMs (8 or 9 bit) of 256K or 1MB each.

The SCSI port was an optional extra; it included a 53C80 SCSI chip and a ribbon cable with a DB-25 socket on a bracket suitable for installation on the back panel of the Lisa.

To support the optional MC68881 FPU, a 68 pin PGA socket was included. The socket can also be used for the pin compatible MC68882RC. A jumper can be configured to change the clock rate of the FPU from 16 MHz to 32 MHz. Very few software packages included support for the FPU, Microsoft Excel (beginning with v4 IIRC) being the only common one, so the FPU makes no difference for most users. A patch is provided in the XLerator software to modify the "Standard Apple Numeric Environment" mathematics package (that forms part of the System software) so that it can use the FPU; with this patch, some benchmarking software displays a substantial performance increase when the FPU is used. Typically it is mainly transcendental functions (eg trigonometric) that show a noticeable improvement.

At the time the original XLerator was designed, SIMMs larger than 1MB were not yet available. After 4MB SIMMs became readily available, along with the MaxiRAM feature of MW+II that enables use of more than 4MB of RAM, a modification was designed to support SIMMs over 1MB. Without the modification, the XLerator provides 512 cycle refresh; with the 1994 modification, 1k cycle refresh is provided -- sufficient for most 8/9 chip 4MB SIMMs. Recently (2024), two-chip 4MB SIMMs requiring 2k cycle refresh have become available; an update to the 4MB modification to provide 2k refresh is in testing. (The XLerator 12.5/18 design uses one of the other refresh modes which does not have a cycle counter limit.)

Is anyone reproducing this card or any used sources?

Thanks!

Quote from: bmwcyclist on February 16, 2025, 07:08:55 PM
Is anyone reproducing this card or any used sources?

A while ago, I discussed the possibility of licensing reproductions with AlexTheCat123, but no agreement has been made... I suspect he is too busy.

Used ones come up on eBay and VintageMicros.com, but not often.

The current listing on eBay by phoebmcleo (with jumper wires on the bottom and hand-written labelling) is not representative of an original XLerator in good condition.

Are you looking for this variant in particular? The 12.5/18 MHz version may be easier to get.

Yeah, I reverse-engineered the 16MHz XLerator (along with its 12MB RAM upgrade) about a year ago. Those GALs were a HUGE pain to figure out, but I finally got them after a couple months of work!

I'm absolutely open to the licensing thing, and I don't think I'm too busy to do it right now. The reason why we never came to an agreement is simply because I forgot!

Hopefully I can make it open-source one day, but some sort of licensing agreement that at least makes XLerators more accessible to people would be a great compromise until then!

Will the 16 MHz card work with third-party memory cards such as the AST ramstak?

Quote from: bmwcyclist on February 28, 2025, 01:22:04 PM
Will the 16 MHz card work with third-party memory cards such as the AST ramstak?

Yeah, it absolutely will! Although keep in mind that the XLerator has onboard RAM SIMMs that are much faster than the Lisa's slot memory boards. If you're running the XLerator in Additive Mode, then it'll combine the XLerator fast memory with the Lisa's slot RAM, which comes with a pretty big performance penalty but lets you use the full capacity of both types of memory put together. But if you run it in Fast Only Mode, then it'll only use the fast memory on the XLerator board itself and the slot memory is pretty much entirely irrelevant.


I personally always use Fast Only Mode because of how much of a performance improvement you get. And if you have the 12MB RAM upgrade on your XLerator like I do, then there's no point in really taking advantage of Additive Mode anyway because the 12MB of fast memory already maxes things out.

Thank you!!!

Quote from: AlexTheCat123 on February 17, 2025, 05:43:00 PM
Yeah, I reverse-engineered the 16MHz XLerator ... Hopefully I can make it open-source one day

Rather than open-sourcing someone else's designs before they are ready to do so themselves, how about open-sourcing your own accelerator design?

I'm sure Lisa owners would love to have an improved accelerator board that is compatible with LOS and the Workshop!

Also needed is a new memory board that uses readily available memory, a SCSI driver for LOS, a replacement for the IWM... there are plenty of untapped opportunities to hone your expertise and contribute to the community (I'm assuming that's your objective).

As I've communicated privately, the simple fact that this issue has arisen has stymied development of a couple of new potential Lisa hardware products... there are fewer reasons to invest resources in developing a new product when someone has shown they are ready to come along and open-source the rug from under you.

I've shelved a few Lisa hardware projects because this imminent threat of open-sourcing a new design would mean I couldn't recover even the cost of prototypes.

Obviously no-one can stop you from disrupting the ever-changing and tiny ecosystem of Lisa products, and perhaps great things may result from disruption, I don't know... just be aware that there are likely to be subtle consequences.

Quote from: sigma7 on March 12, 2025, 03:13:58 PM
Rather than open-sourcing someone else's designs before they are ready to do so themselves, how about open-sourcing your own accelerator design?

Maybe I can do something like creating my own accelerator at some later date, but unfortunately I'm busy with a couple other Lisa-related projects right now that are taking up a good bit of my time. Most notably, trying to compile LOS and its apps. I've been making decent progress so far, but it's very time-consuming and there's still a really long way to go.


Plus, I'll be starting my PhD in the fall, so that's going to take up a good bit of time as well!


I've been thinking about the memory board idea for quite a while now, and I bet it would be pretty easy, but I just haven't gotten around to it yet because of the other things that I've been working on (ESProFile, LOS compilation, college, and so on).


I don't think you need to worry about anyone trying to open-source any new designs that you might come up with. Or at least I know I wouldn't do anything like that! The reason why I replicated the XLerator and PFG was simply because they were unobtanium at that point in time. When there are very few remaining examples of some piece of hardware floating around out in the wild, and I'm lucky enough to have one, then I always think it's a good idea to replicate it since they're only going to become less common over time. But if they're still being sold new, then that's obviously not a problem and there's less of a motive to reverse-engineer something. The XLerator is still very difficult to obtain (until we hopefully reach a license agreement soon), but now that VintageMicros is selling PFGs again, they're much more plentiful than they were. And if John were selling them a couple years ago when I reimplemented the PFG inside an ESP32, I probably wouldn't have even done that project to begin with.


My whole goal with replicating old designs is to try and get rare hardware into the hands of people as easily as possible, but obviously there's no reason to do that if the piece of hardware is still being sold new because then it's not really rare anymore. So with that in mind, I think you should be able to move forward with new projects without too many concerns. I can't speak for other people, but that's my general philosophy with regards to this issue!