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A Lisa Inside An FPGA

Started by AlexTheCat123, September 04, 2025, 05:20:35 PM

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AlexTheCat123

#45
Finally done with the board! Here's the final rendering of it, which looks basically identical to the previous one other than a bunch of additional traces going to the FPGA. And I've also attached a screenshot of the board layout with the inner layers visible so you can see what's going on under the surface; that's where most of the traces converge toward the FPGA.

I'm about to place the order, and the price has gone up a bit thanks to me not selecting a few important options during the first price estimate. But selecting those options now (double-sided assembly for the bypass caps under the FPGA and vias smaller than 0.4mm) have brought the final price up to $525 for two fully-assembled boards and three unpopulated spares. And then there might be tariffs on top of that, but hopefully not. I haven't actually placed a PCB order since the tariffs went into effect, so I'm not completely sure how that works.

Given the complexity of the boards, it's going to take them 8 or 9 days to fabricate and assemble them versus the standard 2-4 days for fabrication and assembly, but hopefully they'll get to me within the next couple weeks!

Edit: Oh my god, the tariff is $289. I could barely afford this before, but I sure can't now. I hate to say it, but this project might have to wait a while until I can save up enough to actually buy these things.

andrew

Damn, that's insanity. It's too bad.  :'(
:)

bmwcyclist

Quote from: AlexTheCat123 on November 10, 2025, 12:56:19 AM
Edit: Oh my god, the tariff is $289. I could barely afford this before, but I sure can't now. I hate to say it, but this project might have to wait a while until I can save up enough to actually buy these things.

Community effort here. How much of a donation would you need to continue your work?
Using my LISA for writing blogs and other work projects and fun and games at home.
LISA 2/10, AST RAM board, ESProfile, FloppyEMU, reproduction LISA 1 mouse, BlueSCSI

AlexTheCat123

Good news! Thanks to an incredibly generous donation by @jamesdenton, I was able to place the order, and I should have the boards on hand within the next 2 weeks. Thank you so much James, I really appreciate it!

Quote from: bmwcyclist on November 10, 2025, 02:07:05 PM
Community effort here. How much of a donation would you need to continue your work?

Thanks for offering to pitch in, but I think I should be good for now!

classiccomputing

I would really love to be able to buy one of these, but I would also need it ready to run.

AlexTheCat123

Quote from: classiccomputing on November 14, 2025, 10:44:48 AM
I would really love to be able to buy one of these, but I would also need it ready to run.

I'm definitely not to that point yet, but that's the ultimate goal. This is just the initial round of prototypes, so I'm absolutely expecting problems!

AlexTheCat123

They just finished assembling the boards, and they'll probably be shipped within the next day or two. Hopefully I get them before Thanksgiving. In the meantime, here's a cool X-ray shot they sent me of the area under the FPGA on one of the fully-assembled boards!

bmwcyclist

Using my LISA for writing blogs and other work projects and fun and games at home.
LISA 2/10, AST RAM board, ESProfile, FloppyEMU, reproduction LISA 1 mouse, BlueSCSI

AlexTheCat123

Good news, the boards are here and they look great! I've attached some pics in case anyone wants to see.

Now into my current progress with testing them, which is mostly good news so far.

I designed each of the switching regulators such that they could be disconnected from the rest of the board, just in case my initial design was bad and was causing them to put out a bad voltage. So I tested them in the disconnected state first, and everything was 0V! Well, it turns out that I labeled the jumper that selects between USB-C power and barrel jack power backwards, so I just swapped the jumper around and then things started coming to life.

All the voltages were spot-on, most of them to the thousandth of a volt. The only ones that weren't were the 1V and 1.8V rail, which were 0.999V and 1.801V, respectively. Definitely close enough. I was honestly shocked at how spot-on the voltages were, and they stayed this consistent under load. The ripple on all the rails is 40mV or less, with most being below 20mV, so pretty darn good and well within spec of all the components.

Then I hooked the PSUs to the rest of the board, and the USB hub activity LEDs came to life! Plugging it into my laptop, all four USB devices (the FT2232 for JTAG, the CP2102N for serial comms with the Lisa, and both ESP32s) were visible, although the ESPs were repeatedly connecting and disconnecting every second for some reason.

Luckily, after programming both ESP32s, they stopped this weird behavior and are working perfectly. I can't really fully test the CP2102N (or the ESP32s, for that matter) until the Lisa is up and running, but I was able to talk to it and program in some custom name and vendor strings, so I'd say it's working pretty well.

The FT2232 is where I encountered my first major problem. Which sucks because it's how you program the FPGA! Xilinx has a tool that flashes its configuration EEPROM (a 93C46) with a special signature that Vivado looks for to recognize it as a USB to JTAG interface, but the tool kept erroring out whenever I tried to flash it. After some experimentation, I discovered that it was successfully programming the EEPROM, but was running out of space. The 93C46 is a 64-byte EEPROM, but it turns out that you need at least 128 bytes (93C56 or above) to store all of Xilinx's configuration data. So there's nothing I can do to make this work with the existing chip.

Luckily though, the 93C46 is the only chip on the entire board (aside from the SCC) that's through-hole, so I went ahead and ordered some 93C56's and I'll just solder one in once I get them in the mail next week.

But fortunately, I put a JTAG header on the board just in case something like this were to happen, so I was able to plug in a Digilent USB to JTAG adapter to try and program it that way. Sadly, it didn't work at first, but then I noticed that it was because I'd plugged in TDI and TDO backwards. After swapping those, Vivado was actually able to see and program the FPGA!

Then I tested out the configuration flash connected to the FPGA (in case you're not familiar with FPGA stuff, this is the nonvolatile RAM where you store your bitstream if you want the FPGA to automatically load it at boot), and that worked too. I put a bitstream in there, and it clearly loads it and illuminates the "DONE" light once it's finished loading!

I flashed the Lisa bitstream to it to try and see how much life I could get out of the Lisa peripherals, and there certainly is some, but clearly there are still some problems to solve. Hitting the Lisa's power switch causes the power LED (connected to the ON signal) to light up, and I get a good HSYNC out of the video connector, but VSYNC and VID are dead. I'm guessing that it's just a problem in Verilog or my design constraints file though as opposed to an actual board problem. We'll see!

Overall, a really successful test; a good bit better than I was expecting!

bmwcyclist

Using my LISA for writing blogs and other work projects and fun and games at home.
LISA 2/10, AST RAM board, ESProfile, FloppyEMU, reproduction LISA 1 mouse, BlueSCSI