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[stepleton]

Hi all,

I'm very pleased to announce the near-completion of a project I've been working on for a very long time --- nearly the entire COVID crisis so far! It's a program for my Cameo/Aphid hard drive emulator that allows you to select and manage drive images from an Apple Lisa, and while that may not be very useful for most people (there aren't that many Cameo/Aphid devices out there in the world), some of the parts that went into it may be handy for something you're working on.

The program, which I'll call the Selector, is up on GitHub now. It's what I was "previewing" in that earlier thread. I said "near-completion" because there are still some more documents to write and disk images to make, but if you made yourself a Cameo/Aphid at some point --- first of all, why not let me know? --- you can check out the new software at https://github.com/stepleton/cameo/tree/master/aphid/selector. There's also a manual that tells you everything the Selector can do.

I hope you won't mind if I geek out a bit about what I've made; maybe you'll find it interesting.


Up until now, a Cameo/Aphid has basically behaved a lot like an ordinary ProFile: you turn it on, and (once it's ready) it pretends to be a hard drive. This has always seemed like a bit of a waste, since the PocketBeagle computer that powers it is a Linux computer with a 1GHz ARM, a ton of RAM, and as much storage as your microSD card allows. The least it could do is give you a menu to let you switch between drive images now and then, so you could boot the Office System for a while and then play with MacWorks after that without much hassle.

I had a pretty good idea of how to build this kind of feature. The code on the Cameo/Aphid that shuffles block data between the drive image file and the PocketBeagle's I/O processors is just a big-ish Python script, so it would be easy to modify it to make some blocks "magical" --- reads and writes to those blocks could do things like create and manage hard drive image files, or really just about anything else you might imagine. So, I gave the script a plugin system, and most of those "magic blocks" behaviours I described in yesterday's thread are these little Python module plugins, like this one for the key/value store that my Selector program uses to store configuration information. I implemented this first, since it was easy for me, and while I didn't have any code on a Lisa that could use this new functionality, it was easy to test with the help of Dr. Schaefer's UsbWidEx gadget.

The next step was harder. I needed to write a bare-metal program that talked to the hard drive, showed text on the screen, and took input from the keyboard, and since I wanted it to work on as many Lisas as possible (and since I also wanted to be able to display lowercase letters), I couldn't use my cheap NeoWidEx trick of jumping into private routines in a specific version of the ROM. I'd have to write everything from scratch.

This is what led me to make the lisa_io library in March and April. Ray egged me on to make an OS, and while I might do that if COVID lasts for too much longer, this is what I was really up to that whole time. I had a good head of steam for a while making some neat UI components, and besides lisa_io, these may be some of the most useful spin-off products of this project. There's

• a single-line textinput box (think of your basic HTML <input> tag),
• a scrolling menu for selecting an item from a list of items,
• and some routines for UCSD p-System style menus like what you find in the Workshop.

I've forgotten to mention that this is all in 68K assembly language (targeting Ray's EASy68k-derived standalone assembler), and like most of my Lisa stuff, it's released into the public domain. I don't trash a lot of registers in this code, so it may not be hard to call it from C or what have you.

Anyway, this was a good start, but I got distracted for a few months by work and by a weird old Whitechapel MG-1 workstation I've had on a (thanks to COVID) very extended loan. As autumn arrived I picked up the project again, and in the usual manner of the last bits stretching out longer than you expect, it eventually reached a state where it could be released. The usual silly feature creep started to take hold, and so now we have

• a built-in editor for items in the key/value store (also, there's a key/value store --- did my project really need a Windows Registry?),
• a cheesy scripting system,
• plus one or two more features that are still dormant for now.

Eventually I stopped adding more bugs by adding more features while I was fixing the bugs, and here we are. I had always hoped to finish it by the time COVID was over, and although I've succeeded, that's only because my plan contained two underestimates instead of just the usual one.


Well, that's it --- thank you if you've read this far! I hope some of this project may be useful; since not many Cameo/Aphid devices exist out there, I'll probably make a video someday for a more vivid show-and-tell than a bunch of text documents. I hope you all have been well for the past months --- here's hoping for a better year this year!

[jamesdenton]

Tom - thanks for the write up on this awesome project! I saw the teaser on Twitter the other day and am finally glad to see more about it. Looking forward to kicking the tires on it. Nice job!

[blusnowkitty]

I don't think I've asked or seen - can the images created by Aphid be loaded into LisaEm or IDLE, or vice versa? This would be a huge game-changer if they could, especially with the work Ray's been doing to get Workshop able to compile in LisaEm and what Al Kossow has been working on.

[rayarachelian]

I don't think I've asked or seen - can the images created by Aphid be loaded into LisaEm or IDLE, or vice versa? This would be a huge game-changer if they could, especially with the work Ray's been doing to get Workshop able to compile in LisaEm and what Al Kossow has been working on.

I'm guessing they can be transferred with BLU just like any ProFile, but yeah, if there's documentation about the native format of how the individual ProFile disk images are stored on the SDXC, and maybe access to a sample dd of the SDXC itself, one that has several images on it, I can take a look and write a translator tool, after which you can "sneakernet" the SDXC card to your mac/pc and run a tool to move the data to/from LisaEm, and by extension IDLE (I think it's using either rraw or raw formats for which I have a translator to/from dc42.)

If it's just a bunch of disk image files on a FAT32 file system that makes it easier, then I'd need to know the file format of each image and where the tags are, but if it's a muxing partiton, similar to what the X/ProFile has odd/even stars, it would need slightly more work.

[stepleton]

The disk images are not .dc42 disk images, but they will be easy to convert.

They're just ordinary files on a FAT partition on the microSD card. The way you make the files is very simple: you just take block $000000, write its 532 bytes to the file, then take block $000001 and write its 532 bytes after that, then block $000003, then $000004, and so on until you run out of blocks. Like a real ProFile, the drive emulator doesn't know about the structure of the blocks --- tags and data and so on --- it just treats them like 532-byte chunks.

There is no header or footer information --- it's just the drive data and nothing else. There is no interleaving either: all blocks are arranged in sequential order. This program by Ray may already be capable of converting them into .dc42 format:

https://github.com/rayarachelian/lisaem/blob/master/src/tools/src/raw-to-dc42.c

This is a convenient format for the emulator, which just `mmap`s the entire file and does reads and writes to something that looks to Python like a big list.

Anyhow, you can pull the microSD card out of the Cameo/Aphid, plug it into a modern computer, and just copy these disk images to and from the FAT partition like any other file.

(ETA: It is good manners to unplug the Cameo/Aphid first.)

[stepleton]

Now that my fun software project is basically complete, I have to return to the cold reality that Cameo/Aphid is a piece of hardware that wasn't designed by an EE --- and so there is one hardware bug! I thought it might be good to describe the bug here in case anyone has any thoughts about what might be going on. I have a feeling that the fix will involve adding a component to some empty pads on the Cameo PCB, so hopefully not a bad one as these things go.

Here's the problem: you just can't boot a Cameo/Aphid from the upper port of a parallel interface card.

It is the strangest issue, since it appears only to affect booting and nothing else. BLU will detect and work just fine with a Cameo/Aphid installed on that port. The Office System will format a Cameo/Aphid there and will read and write files on that drive all day long. Also, there is no problem with booting from any other port: the built-in port on a Lisa 1 or 2/5, the Widget parallel cable on a 2/10, the lower port on the 2-port card. Those all work without any issues.

This problem reproduces identically across two parallel interface cards that I own. It's possible that this is a signal quality issue relating to bus termination. I assume this is so because the 100 ohm series resistors that I've put on the signal lines in the current SMD layout, which you can see here:

https://github.com/stepleton/cameo/blob/master/aphid/pics/smd_layout.png

actually make the problem worse. You see, it used to be that I used only 0-ohm jumpers everywhere. In this older configuration, the upper parallel port would sometimes boot successfully, but the Widget parallel cable would not work under any circumstances. Some termination was clearly required, and with the 100-ohm resistors, the Widget cable became reliable for all accesses, while booting (and only booting!) on the second parallel port was broken forever.

Now that the Selector is done, perhaps it's time to get to the bottom of this issue. I have to admit feeling a bit daunted! One bit of good news though is that the "plugboard" that you use on the Cameo (1, 2) to hook up individual signal lines will likely make it really easy to introduce the components that make up a fix, whatever the fix winds up being. It's almost like I expected to have to deal with a problem like this

Some observations that may be important:

- When the boot fails, the error message complains of an error 81. On the boot ROM, this means "DISK NOT READY", which suggests that something may be amiss with the BSY line. But then again, when you boot from the parallel card, it's the parallel card who's complaining, not the boot ROM. So who knows if 81 means the same thing.

- Cameo is built out of fancy-pants TXS0108 bidirectional level adaptor chips to convert between 5V signalling and 3.3V signalling. These things are pretty funky---they detect which side of the connection (the 5V side or the 3.3V side) is driving the signal automatically and then drive the other side with the voltage it expects. There's no way to force a fixed direction, which would be appropriate for the BSY line, which is always driven by the emulator. Maybe there's some noise or voltage on BSY from the parallel card upper port that fools the TXS into thinking the parallel card is in charge on that pin.

(Why fancy TXS0108 adaptors instead of something much simpler? I wanted Cameo to be useful for more than just ProFiles---basically general purpose 5V I/O for the PocketBeagle computer. Maybe you could also do IEEE-488/GPIB/HPIB with it...)

[rayarachelian]

- When the boot fails, the error message complains of an error 81. On the boot ROM, this means "DISK NOT READY", which suggests that something may be amiss with the BSY line. But then again, when you boot from the parallel card, it's the parallel card who's complaining, not the boot ROM. So who knows if 81 means the same thing.

Indeed:

Code: [Select]

0000| 0000 0051             DSKBSY          .EQU    81              ;DISK NOT READY
...
1F70| 48E7 3F7E             PROREAD MOVEM.L D2-D7/A1-A6,-(SP)       ; save regs
1F74|                               DISABLE                         ; ensure interrupts off
1F74| 40E7                 #          MOVE     SR,-(SP)
1F76| 007C 0700            #          ORI      #$0700,SR
1F7A| 6174                          BSR.S   PROINIT                 ; init for Profile access and check
1F7C|                                                               ;  if attached
1F7C| 6704                          BEQ.S   CHKBSY                  ; go on if OK
1F7E| 7050                          MOVEQ   #NODSK,D0               ; else set error code and
1F80| 605C                          BRA.S   PROERR                  ; skip if error - no disk attached
1F82|
1F82|                       ;  Now check if Profile ready - wait time presently set for about 100 seconds
1F82|                       ;  to allow enough time for normal Profile startup time of about 80 seconds
1F82|
1F82| 0810 0001             CHKBSY  BTST    #BSY,IRB2(A0)           ; check if Profile ready (not busy)
1F86| 6608                          BNE.S   TRYRD                   ; skip if yes
1F88| 5382                          SUBQ.L  #1,D2                   ; else loop until timeout
1F8A| 66F6                          BNE.S   CHKBSY
1F8C|
1F8C| 7051                          MOVEQ   #DSKBSY,D0              ; set disk busy error code
1F8E| 604E                          BRA.S   PROERR                  ; and go to error exit
1F90|

So this is what PROINIT does, the Boot ROM expects BSY to be in the ready state right after this, perhaps your timing is a little off:

Code: [Select]

1FF0|                       ;----------------------------------------------------------------------------
1FF0|                       ;  Subroutine to init parallel port for Profile access.
1FF0|                       ;  Inputs:
1FF0|                       ;       None
1FF0|                       ;  Outputs:
1FF0|                       ;       D0 cleared for error use
1FF0|                       ;       A0 = VIA base address for parallel port
1FF0|                       ;       CCR zero bit set if cable connected
1FF0|                       ;  Side Effects:
1FF0|                       ;       None
1FF0|                       ;----------------------------------------------------------------------------
1FF0|
1FF0|                       PROINIT
1FF0| 4280                          CLR.L   D0                      ; clear for result use
1FF2| 267C 00FC DD81                MOVE.L  #VIA1BASE,A3            ; get kybd VIA base address                     CHG036
1FF8| 0013 00A0                     ORI.B   #$A0,ORB1(A3)           ; initialize profile-reset and parity-reset     CHG036
1FFC| 002B 00A0 0004                ORI.B   #$A0,DDRB1(A3)          ;  and set lines as outputs                     CHG036
2002| 207C 00FC D901                MOVE.L  #VIA2BASE,A0            ; get paraport VIA base address
2008| 0228 007B 0060                ANDI.B  #$7B,PCR2(A0)           ; set ctrl CA2 pulse mode/positive edge
200E| 0028 006B 0060                ORI.B   #$6B,PCR2(A0)
2014| 4228 0018                     MOVE.B  #$00,DDRA2(A0)          ; set port A bits to input
2018| 0010 0018                     ORI.B   #$18,ORB2(A0)           ; then set direction=in, cmd=false,             CHG036
201C| 0210 00FB                     ANDI.B  #$FB,ORB2(A0)           ;  enable=true                                  CHG036
2020| 0228 00FC 0010                ANDI.B  #$FC,DDRB2(A0)          ; set port B bits 0,1=in,
2026| 0028 001C 0010                ORI.B   #$1C,DDRB2(A0)          ;  2,3,4=out
202C| 0810 0000                     BTST    #OCD,IRB2(A0)           ; check OCD line
2030| 4E75                          RTS                             ; and exit
2032|

So maybe play around with that. Perhaps the LOS driver or whatever else you're testing is not as sensitive to the timing.

[stepleton]

Thanks Ray! I think this is a hardware problem, though. The fact that it works on the lower port but not the upper port is just too suspicious, since both ports must use the exact same code from the parallel card ROM --- and while PROINIT is relevant, I haven't checked to see if that code in the Lisa boot ROM (which is only for the built-in parallel port, I think) is the same as the parallel card ROM's ProFile I/O code.

I'm really tempted to disassemble the parallel ROM and see what it does, since after all I am a Software Guy and I would love to try and tackle this problem with software. But I think I gotta do it the hardware way, it just seems too much like a hardware issue. I've got the tools (oscilloscope, breakouts); I should get better at using them.

Last night I hung the scope off of the ~PBSY and observed that as the computer tried to talk to the ProFile, ~PBSY wiggled around a bit and then just stayed low for too long --- definitely the reason for the DISK NOT READY error. Time now to put channel 2 on ~PCMD and see what it's doing. Noise there could throw my emulator's state machine out of whack, causing those funny wiggles. Or maybe the only problem is on ~PBSY after all.

The TXS0108 level translator is a delicate device, and in all likelihood this application (pushing bits down a bus of any length) is probably pushing it to its limits. It's almost too tempting for a newbie like me: just throw it between the 3.3V and 5V devices and don't worry about all of that messy electronics stuff, the magic chip will handle everything on its own. As an older and wiser hobbyist now, I know better: the real solution is TI's even more magical LSF0108 device. Or wait, no, maybe it's the SN74GTL2003.

Just kidding. In the worst case, if I can't get the current device to work, there is definitely a solution that is ProFile-specific and that uses a few more conventional unidirectional parts similar to what you find behind the parallel port in a real ProFile. It's a new board to design, but it'll still be pretty cheap.

[rayarachelian]

I think this is a hardware problem, though. The fact that it works on the lower port but not the upper port is just too suspicious

Or it might be that specific port on that specific 2x parallel card went bad or marginal, or it's VIA is failing, etc. If it's working on 2/3 ports, maybe the problem is unlikely to be with your device, but that specific port failing?  Maybe swap the two VIA 6522s on the card if they're socketted? Maybe a cap on that board is marginal?

If you think it's because of noise and debouncing/cleaning it, it would help, maybe add a Schmit trigger on those lines? Or go all out and add a pair of octal tristate Schmitt trigger to cover all the lines?

[stepleton]

That's what I'd hoped at first too. Unfortunately the problem shows up on both of the parallel cards that I own, and both cards' upper ports work fine with a real ProFile or with an IDEfile.

Got the 'scope out now, having a look

[rayarachelian]

That's what I'd hoped at first too. Unfortunately the problem shows up on both of the parallel cards that I own, and both cards' upper ports work fine with a real ProFile or with an IDEfile.

Hmm, so this would imply there's something different about the ports. Been looking at http://bitsavers.org/pdf/apple/lisa/hardware/050-4027-A_Parallel.pdf and I don't see anything too obvious, both seem to have very similar circuits, I see PB7 and the gate it goes to are above the VIA in one drawing and below in the other, but they're the same circuit. Both have resistor packs. Both have the LS280, 245, 09 on PA lines for the parity checker,  both use the phi2 clock, they do share the DTACK circuitry... so what else could it be?

Does it work on both ports if you're not booting from it? i.e. just as a data disk?

I started a disassembly of the 2x parallel ROM here: https://onlinedisassembler.com/odaweb/c2Cu8Ejq/0 I removed the 1st 5 words from the disassembly, but not sure if that's correct or not. The ROM is here: http://bitsavers.org/bits/Apple/Lisa/firmware/341-0193-A.BIN

Not sure what the offsets are supposed to be as it's a bit weird. The 1st 5 words are:  e0 02, 03 fd, 60 08, 60 02,  05 c7
e0 02 - this is the card ID, e0=has icon, has status, is bootable. 02=2x parallel port card id

Code: [Select]

03fd - number of words in the ROM
6008 - this is the offset to the status entry routine
6002 - this is the boot routine
05c7 - icon pointer in packbits format.

But 6002 is outside the size for this card, so it's got to be at 20002 most likely, not sure what the significance of the 60 is.

The first instruction is a branch to 202a2 which checks d0 for the device id and makes decisions from there, likely loading the address of the VIAs and the device to boot from.

[stepleton]

Thanks for looking at the ROM! Now I know from my Applenet disassembly that 6008 and 6002 aren't sizes: they're the first words of the status entry and boot routines themselves. Of course there's not much room for code in 16 bits each: you just get one small instruction. So the one instruction in both cases is: jump to the place where the real code is.

Does it work on both ports if you're not booting from it? i.e. just as a data disk?

It does work as a data disk, which was one of the things that was such a mystery. But thanks to the probing I did just now, I have an answer for why booting alone was a problem. I wonder if I would have figured it out from a disassembly.

For some reason the Lisa parallel port card likes to give the ~PCMD (that's the "HEY HARD DRIVE" signal for folks following along) on both of its ports a good shaking prior to talking to either of the ports on boot: both ports get the business no matter which port you're booting from. I don't know the reason for this, but it also seems to happen during the POST, which must mean that it's happening in the status entry routine. (IIRC, in addition to during POST, the boot ROM runs the status entry routine prior to running the boot routine.)

Now, when Cameo/Aphid is on the lower port, it's no problem: see the first attachment.

The blue trace is ~PBSY, the "We are dealing with your request" line that comes back from the hard drive. Basically, the Lisa stabs ~PCMD down very briefly, then gently pulses it down a couple of times more. This three-wiggle manouvre repeats eight times for some reason.

(The reason ~PCMD doesn't drop to 0, I think, is because I've got a series resistor on the line for termination, and there's a pullup on the Lisa end, so the probe is sitting in the middle of a voltage divider.)

Now let's move Cameo/Aphid to the top port: see the second attachment.

You can see here that our poor guy is a little more confused by all this nonsense: while last time ~PBSY goes high very crisply after a wiggle, now it sometimes takes a little longer. The final wiggle keeps ~PBSY low for nearly 11 seconds, which is way too long for the parallel card boot routine: it times out.

Look at how long it takes ~PBSY to return to high after wiggles 1, 2, and 7. It's very suspicious that the delay seems to be an integer multiple of other obvious intervals --- I'd say it's about 88us given the labeled period there.

My hunch now is that we're not seeing the entire story of the wiggles. There are probably other control lines to check out. I bet we're getting treed up at this point:
https://github.com/stepleton/cameo/blob/master/aphid/firmware/aphd_pru1_control/aphd_pru1_control.cc#L328
waiting on PR/~W, the direction signal from the parallel card. Maybe it's doing something weird.

As you've noted, the upper and lower ports seem pretty similar on the schematic, so any difference between the two may be down to the layout?

http://bitsavers.org/pdf/apple/lisa/pcb_pictures/620-0135-A_Parallel_F.jpg

Those traces for the upper port are longer...

[rayarachelian]

So then my guess is that the aphid hardware is a lot faster and notices these ups/down where as a real profile and IDE file use a slower processor which would average them out to a nice flat line. So either a switch debounce circuit would solve this, or you could do something similar via software where you don't act on the CMD going back up to 5V immediately, but wait a bit to see if it gets pulled down again, etc. before flipping BSY?

Edit: This is what I was talking about regarding the Schmitt trigger circuit: https://mansfield-devine.com/speculatrix/2018/04/debouncing-fun-with-schmitt-triggers-and-capacitors/

[stepleton]

You may be right about that. The main problem facing any theory though is that it has to account for why there's a problem on the upper parallel port but not the lower one.

I got some traces of PR/~W, which is also wiggling in a confusing way, but there wasn't really much difference there between the two ports that way. The signals seem very similar. It's possible that whatever the problem is, it's being provoked by a different control line.

Can't hold back my "software guy" any longer. To narrow down the possibilities for signals that are triggering the problem, it will help to know what state the Cameo/Aphid state machine is in when it gets stuck for so long. This kind of inspection was a big part of my initial debugging process, which is why the state machine implementation has statements like these:

https://github.com/stepleton/cameo/blob/master/aphid/firmware/aphd_pru1_control/aphd_pru1_control.cc#L318

The heart of the PocketBeagle single-board computer is a TI AM335x SOC, which is an ARM core paired with two real-time I/O processors called PRUs --- they're decent little RISC devices. The PRUs talk to the pins and then the ARM talks to the PRUs. It's handy because if Linux on the ARM wants to steal the CPU away from the disk emulator in order to do some other task, it won't interfere with the timing that the parallel port hard drive protocol requires. Dr. Schaefer notes on his IDEfile page that the Apple can send bytes down the cable (or demand that they flow back up the cable) at a megahertz, and the drive just has to deal with it; there's no flow control like on a serial port, so it can't drop the ball.

Anyway, the state machine code linked above is running on one of the PRUs. It's recording the current state to a shared memory region that's accessible to the ARM, so you can write a nice program for the Linux side that probes that shared memory in /dev/mem and reads that useful debug information. Thank goodness I took notes on where to look:

https://github.com/stepleton/cameo/blob/master/aphid/firmware/aphd_pru1_control/aphd_pru1_shared_memory.h#L95

I used to have such a program, but I seem to have lost it forever. Too bad; I can write another one. Time to remember how to mmap again...

[rayarachelian]

shmem ops are pretty straightforward, it's almost like using malloc but it's mapped to a "file", you could use that with /dev/shm, and once you get a pointer back, the offset is equivalent to the file offset.
However, you mentioned something yesterday that might be a clue, you've noted that the upper and lower ports have slightly different lengths in their traces. This shouldn't matter at all because normally you'd have a ProFile at the end of a 3 foot 25-conductor cable, right?
So are you hanging the Aphid directly on the port itself? Or is there a cable between it and the port?

Perhaps hanging it off the port is the issue because the wire is too short and it's causing some kind of EM/RF interference from some other noisy thing in the Lisa, or just the right condition to cause a resonance?
Or perhaps the wires are indeed too short and the resistor pack terminating the pins is now slightly out of spec enough due to changed capacitance? I recall seeing something similar with 10B2 and early 10BT ethernet where if your cable was too short you'd have issues.

In terms of the direction of the BSY line and the voltage converter, you could always skip going through that chip and instead use a resistor to drop the voltage from ~5v to roughly 3.3v if you think it's the converter chip. And if you want to ensure direction, use a diode too, which would also drop the voltage by ~.7v. Hmm, or instead of a resistor, if you'd use 3 diodes in series it could drop the voltage from 5v to 2.9v which likely should still ok with the rest of the circuitry.