Guys, girls,
I'm reading and archiving your emails as i wasn;t able to boot my Lisa next time i tried (9 month ago).
I surely use all this and i wanted to say that you are doing a wonderful job helping the community.
Happy 2013 to all !
Bernard
On Jan 8, 2013, at 21:18 , James MacPhail <gg__at_email.domain.hidden> wrote:
>
>> I was right, one of the 444C-3 memory chips is bad, I just did not
>> want to wait for new chips and installed sockets on the io board, so
>> I could swap the memory from the IO board of the LISA 2/10 and
>> voila, the ROM is seen correct.
>
> Congratulations!
>
> I had almost finished the following post, so even though you have solved your problem, I figured I should submit it in case it helps someone else some day...
>
> Since you can get to the self-test, you can use service mode to do some troubleshooting.
>
> When the self-test fails, enter service mode with Apple-S.
>
> Use the set and display memory functions to write and read the odd bytes in the region of FCC400 to FCC7FF. This is the data buffer portion of the shared memory between the CPU and 6504.
>
> For example:
> display a block of memory by typing
> 1 fcc400 80
>
> If you type that a few times, the data in the odd bytes (last two characters of each 4 character word) should remain the same.
>
> set a block of memory, for example to 0,1,2,3,4,5,6,7 by typing
> 2 fcc400 0000 0001 0002 0003 0004 0005 0006 0007
>
> When you display the memory again, the values you wrote should be there. (Since only the odd bytes are used, the first byte of each word is ignored when writing, and may read back as FF or any other value.)
>
> You could also check FCC180 to FCC1FF, which is the PRAM portion of the shared memory (which is lost when power is removed, so no worries about changing things here).
>
> If you can read back what you write to a variety of addresses in shared memory, then the memory is probably good, as well as the data path from the CPU to the I/O Board. This would suggest the 6504 is not running properly.
>
> If you cannot read back what you write, then the memory may be bad, or there may be a problem in the data path between CPU and I/O.
>
> To test the data path between CPU and I/O Board, you can write/read the parallel port 6522...
>
> You should be able to read back what you write to the 6522 shift register at FCD951. For example:
>
> 2 fcd951 55
> 1 fcd951 1
>
> should show ("x" might be any hex digit)
> xx55 xx55 xx55 xx55 xxxx xxxx xxxx xxxx
>
> You should also be able to see the high order byte of timer 2 count down by typing
> 1 fcd949 8
> The odd byte of the first 4 words should be decrementing, for example, you may see:
> xx9C xx99 xx97 xx95
>
> Good luck!
>
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Received on 2015-07-16 07:26:51