LisaList2

Really cool, David. Thank you.

I just recently uploaded both Rich Page & John Woodall, so please have a watch/listen.

Rich Page:
John Woodall:

Some bad news.

JLC finished manufacturing the v3 boards on the 18th as expected, but it's been several days and they still haven't shipped. Normally they ship the day after manufacturing is done, but not this time, presumably because of the large size of the order. It's so late at this point that there's no way they'll be here in time for VCF. So if you were coming in the hopes of getting your hands on a board, then I'm sorry! They'll still be for sale online afterwards though.

Regardless, I'll absolutely have the two v2 boards set up at VCF for anyone to play with, so at least there's that, plus my presentation on the entire project.

QuoteI guess that schematic should be more accurately called "Lisa 1 and Lisa 2/5 I/O Board Schematic". Given that my replica I/O boards have a footprint for R47, it still has to be present on the schematic, but you just don't populate that component on the 2/5. You're totally correct that I could've named it better to avoid the confusion!

Small detail. Again, this board wouldn't be the same without you.

And yes, a new LS367 did the trick and my board works great now. Thanks again to yourself and James. I am always in awe at the breadth and depth of knowledge that you guys bring to this community, and I learned so much from you ! And thanks for giving your time to the small guys like us

Quote from: pintoguy on May 20, 2026, 01:39:02 PMPS: @Alex, I hate to always point out little details from your posts, as you're giving SO much to this community, but in your Lisa 2-5 schematics, I think you still have R47 in the IO Board, when it has been removed from the Lisa 1 board

I guess that schematic should be more accurately called "Lisa 1 and Lisa 2/5 I/O Board Schematic". Given that my replica I/O boards have a footprint for R47, it still has to be present on the schematic, but you just don't populate that component on the 2/5. You're totally correct that I could've named it better to avoid the confusion!

So signals HDS, DR0-1, MT0-1 and Ph1-3 all look OK. However, PH0's waveform has the proper shape, but low-ish voltage past the buffer (pin3) at ~1V. Pre-buffer (pin 2) is OK at 5V. On my good board, all PH0-3 voltages to the actuator are ~3.5V (0-p). So it looks like I need a new 8T97. This is the second time for me.

Thanks again James and Alex.

PS: @Alex, I hate to always point out little details from your posts, as you're giving SO much to this community, but in your Lisa 2-5 schematics, I think you still have R47 in the IO Board, when it has been removed from the Lisa 1 board

Quote from: pintoguy on May 20, 2026, 12:02:36 PMYou mention pins 6 or 8 of LS244. Are you talking about DR0-DR1 selection ? If it is, shouldn't it be pins 6 or 8 of LS04 at U3F. Or could it also be MT0-MT1 at pins 7 or 9 of LS244 at U4F ?

Yeah sorry, you're right. DR0 and DR1 are on pins 8 and 6 of the LS04, and MT0 and MT1 are on pins 7 and 9 of the LS244.

OK, thanks. And yes, I had already suspected a problem with polarity of the FDD connector, but dismissed it because it's more likely to damage the FDD than the IO board, but who knows. I also looked at Ph0-3 signals pre- and post-buffers and did not see anything majorly wrong, but I'll look again.

You mention pins 6 or 8 of LS244. Are you talking about DR0-DR1 selection ? If it is, shouldn't it be pins 6 or 8 of LS04 at U3F. Or could it also be MT0-MT1 at pins 7 or 9 of LS244 at U4F ?

Quote from: sigma7 on May 19, 2026, 03:07:12 PMFinally, U4F LS244 pin 6 (or maybe it is 8 for the lower drive, I don't recall) drives the drive enable signal which is involved in selecting the SNS source.

The lower drive is drive 1 and the upper drive is drive 0, so the lower drive enable pin is going to be LS244 pin 6. I got this backwards on LisaFPGA and was wondering why the drive wasn't working, so now it's permanently burned into my head!

Quote... following RDA to pin 13 of LS174, I did find that it was shorted. I quickly replaced that chip, convinced that would solved the problem, and it kind of did: Error 57 went away when a floppy was not inserted, but it remained when it was. The code now changed to 0D (13 in decimal: timeout while looking for track zero). So we are facing the second layer of the onion.

As you've found and fixed a bad part, but not yet resolved the error implying further parts are bad, I'm thinking the board suffered some kind of trauma (such as a floppy connector plugged in backwards or who knows what). In that case, all of the signals connecting to the floppy drive come into suspicion.

The trace showing (I think) that the SNS signal is now active (no longer stuck low) may clear U3B from the earlier suspicion of shorting the pin, but it may still be bad in a different way.

Another possible cause of the FDC not being able to get Track 0, Disk-in-place, etc. is some problem in the circuitry that selects which item to sense.

U2F 8T97 is a part that is often replaced due to a different symptom (when the I/O Board isn't responding to some access requests with DTACK).

I suggest you scope the outputs of U2F on pins 3, 5, 7, 9 to check they are active when the FDC is trying to control the drive. In particular, pin 3 driving Ph0 (aka PhiA) is involved in selecting the SNS source.

Also, U3F LS04 pin 12 drives the head select signal which is involved in selecting the SNS source.

Finally, U4F LS244 U3F LS04 pin 6 (or maybe it is 8 for the lower drive, I don't recall) drives the drive enable signal which is involved in selecting the SNS source.

edit: as all of the above are buffers, you might use the second scope channel to compare the input and output of each buffer and confirm the signal is propagating through.

edit 2: as pointed out later in the thread, the drive enable signals don't come from U4F LS244, but U3F LS04. Thanks to Alex for offering to take the blame, but it was actually my mistake that he replied to.