Re: Troubleshooting X/Lisa RAM boards - first draft

From: gilles <gilles.fetis_at_email.domain.hidden>
Date: Fri, 25 Mar 2011 12:33:12 -0700 (PDT)

we can try to simulate by emulation, with Idle or lisaem. After each memory read, depending on hardware address we may alter the result (bit stuck to 0 ou 1, random value, last value on bus...). I'm not sure have time in the near future but I can do the test if it's not urgent.

On 25 mar, 19:16, James MacPhail <g..._at_email.domain.hidden> wrote:
> The Lisa's power-on self-test attempts to provide information for
> repairing memory boards.

>
> While writing this, I was able to pinpoint a specific chip and repair
> a bad board, but I could have parts of this wrong. Hopefully others
> will report successes and failures and the technique can be more
> firmly established.
>
> During the self test, the results of the memory test are stored in
> some low memory locations (accessible from service mode).
>
> Beginning at $186, there are 16 words of bit error information; these
> 16 correspond to the sixteen 128K blocks in the 2MB RAM address
> space. The Apple 512K memory boards have 4 rows of chips (each row
> being 128K). This means that 4 of the test result words will exactly
> correspond to the 4 rows of a memory board.
>
> Each word contains bad bit information... a bad data bit is reported
> by the corresponding bit set to 1 in the word corresponding to the
> 128K memory block where it was found.
>
> It is easy to associate the bad data bits with the coordinates of a
> column of 4 chips on the memory board; from the schematic: bit 0 is
> column 22, bit 7 is column 15, bit 8 is column 1 and bit 15 is column
> 8.
>
> The rows of 128K are designated B, C, D, and E by the coordinates on
> the board. However there is a complication or two...
>
> The 16 words are according to logical address, not physical address,
> and it is, of course, a physical chip we're looking for. The
> complication is that the physical rows are mapped to logical
> addresses in a different order depending on which slot the board is
> in.
>
> If you have one memory board, regardless of which slot it is in, it
> will always be associated with the first 4 words... $186 - $18C.
>
> If you have two 512K memory boards, the first 4 words are associated
> with slot MEM 1, and the next 4 words are associated with slot MEM 2.
>
> The four rows of the memory board are always mapped in BCDE or EDCB
> order (depends on the slot), so you can be confident that a single
> bit error maps to one of two rows... if the error is in the first or
> last of four words, then the problem is row B or E. If the error is
> in the second or third word, then the problem is C or D.
>
> To figure out which of the two rows is the problem, you can read-up

> on the physical-logical address mapping scheme in the Lisa Hardware
> Reference Manual, and cross-reference that through the schematic to
> determine which physical row is going to correspond to which logical
> address block.
>
> Or you can use a rule of thumb determined by observation.
>
> I expect the latter will be more useful.
>
> I have observed that for slot MEM 1, the order is BCDE, and for slot
> MEM2, the order is EDCB.
>
> Examples:
>
> A. 1 RAM board installed, error reported in first 4 words...
> - 0000 4000 0000 0000
> - error in bit 14 which is column 7
> - if the board is in MEM 2, the second word corresponds to Row D
> - if the board is in MEM 1, the second word corresponds to Row C

>
> B. Error in second 4 words...
> - 0000 0000 0000 0000 0020 0000 0000 0000
> - this might happen if you have 1MB of RAM - 2 boards
> - error in bit 5 which is column 17
> - the second 4 words corresponds to MEM 2
> - the first word (of the second 4) corresponds to Row E

>
> Summary of the rows corresponding to the first 8 words starting at $186
>
> 1 board in slot MEM 1
> - B C D E Ê x x x x

>
> 1 board in slot MEM 2
> - E D C B Ê x x x x

>
> 2 boards
> - MEM 1 Ê Ê MEM 2
> - B C D E Ê E D C B
>
> Complication #2
>
> You may have noticed something missing... there are 18 columns of
> chips, not 16. The extra 2 are for parity bits, one for each byte.
>
> If there was a parity error, then all the data bits might be clean,
> represented by 0 in all 8 words at $186. In this case, you will get
> error 71 instead of 70 from the memory test.
>
> I have not been able to observe this case, but from the ROM source
> listing it appears that in the case of a parity error:
>
> - long word $270 contains the logical address where the error occurred
> - byte $27C contains a number that corresponds to the row (eg. 2 for
> row D when the problem board is in MEM 1)
> - byte $27D contains $9 or $14, which correspond directly to the
> board coordinate column of the bad parity chip, column 9 or 14.
>
> Miscellaneous
>
> - To enter service mode, type Apple-S after the memory error is reported
>
> - To display the 16 words at $186 type: 1186 20<return>
>
> - If your memory board has a serious problem in Row B or E, then the
> Lisa might not work at all, since it needs some working memory to do
> the self-test. In this case, try moving the board to the other slot,
> and/or add a good board in the other slot. These will change the
> logical address of the bad row and may allow the Lisa to work well
> enough to perform the self-test.
>
> - This information applies to the long test. There is a short test
> that is performed after a warm reset; I believe it consolidates all
> the bit errors into the one word at $186, ie. the row(s) are not
> decoded. To make sure you are getting the long test, first turn off
> the Lisa, and if you have batteries on your I/O board, turn off the
> switch (and check the FAQ about removing the batteries to prevent
> corrosion damage).
>
> - This information is specific to the 512K Apple memory boards. If
> you have a different memory board you'll still get the error results,
> but mapping them to a physical chip is not addressed here.
>
> Caution!
>
> As some of this was determined by observation, and some by
> interpretation of the ROM listing, it would be good to have some
> independent confirmation before I add this to the LisaFAQ... please
> report your own experience!
>
> >>Has anyone on the list had experience of the Lisa Test program? ÊI
> >>have a couple of faulty memory cards on my third Lisa and wonder if
> >>this program will let me identify the exact chip(s) that might have
> >>failed?
>
> It would be good to know if Lisa Test makes troubleshooting easier
> than this procedure... comments or experience?
>
> James

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Received on 2011-03-25 12:34:48

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