Troubleshooting X/Lisa RAM boards - second draft

From: James MacPhail <gg__at_email.domain.hidden>
Date: Thu, 25 Aug 2011 15:25:48 -0700

The Lisa's power-on self-test attempts to provide information for repairing memory boards.

During the self test, the results of the memory test are stored in some low memory locations (accessible from service mode).

Beginning at $186, there are 16 words of memory bit error information; these 16 words correspond to the sixteen 128K blocks in the 2MB RAM address space. The Apple 512K memory boards have 4 rows of chips (each row being 128K). This means that 4 of the test result words will exactly correspond to the 4 rows of a memory board.

Each word contains bad bit information... a bad data bit is reported by the corresponding bit set to 1 in the word corresponding to the 128K memory block where it was found.

Columns:

It is easy to associate the bad data bits with the coordinates of a column of 4 chips on the memory board; from the schematic: bit 0 is column 22, bit 7 is column 15, bit 8 is column 1 and bit 15 is column 8.

If there is just one bit set (ie. only one bad chip), then there are 16 possible values for the word, which map to memory board columns as follows:

Word Bit# = Column
---- -- --

0001   0   =  22
0002   1   =  21
0004   2   =  20
0008   3   =  19
0010   4   =  18
0020   5   =  17
0040   6   =  16
0080   7   =  15
0100   8   =   1
0200   9   =   2
0400  10   =   3
0800  11   =   4
1000  12   =   5
2000  13   =   6
4000  14   =   7
8000  15   =   8

If there is more than one bad chip, there will be more than one bit set and you'd get a character other than 1,2,4,8, or more than one non-zero character in the word.

Rows:

The rows of 128K are designated B, C, D, and E by the coordinates on the board. However there is a complication or two...

The 16 words are according to logical address, not physical address, and it is, of course, a physical chip we're looking for. The complication is that the physical rows are mapped to logical addresses in a different order depending on which slot the board is in.

If you have one memory board, regardless of which slot it is in, it will always be associated with the first 4 words... $186 - $18C.

If you have two 512K memory boards, the first 4 words are associated with slot MEM 2, and the next 4 words are associated with slot MEM 1.

The last 8 words are never used with 512K memory boards, since they correspond to the second MB of the logical address space. They would be used if you have more than 1MB of memory.

The four rows of the memory board are always mapped in BCDE or EDCB order (depends on the slot), so you can be confident that a single bit error maps to one of two rows... if the error is in the first or last of four words, then the problem is row B or E. If the error is in the second or third word, then the problem is C or D.

To figure out which of the two rows is the problem, you can read-up on the physical-logical address mapping scheme in the Lisa Hardware Reference Manual, and cross-reference that through the schematic to determine which physical row is going to correspond to which logical address block.

Or you can use a rule of thumb determined by observation.

I expect the latter will be more useful.

It has been observed that for slot MEM 1, the order is BCDE, and for slot MEM2, the order is EDCB.

The rows corresponding to the first 8 words starting at $186 are used as follows:

1 board in slot MEM 1
- B C D E x x x x

1 board in slot MEM 2
- E D C B x x x x

2 boards
- MEM 2 MEM 1

• E D C B B C D E

Examples:

1. 1 RAM board installed, error reported in first 4 words...
   - 0000 4000 0000 0000
   
   • error in bit 14 which is column 7
   • if the board is in MEM 2, the second word corresponds to Row D
   • if the board is in MEM 1, the second word corresponds to Row C
2. Error in second 4 words...
   - 0000 0000 0000 0000 0020 0000 0000 0000
   
   • this might happen if you have 1MB of RAM - 2 boards
   • error in bit 5 which is column 17
   • the second 4 words corresponds to MEM 1 when 2 boards are present
   • the first word (of the second 4) corresponds to Row B of MEM 1

Complication #2

You may have noticed something missing... there are 18 columns of chips, not 16. The extra 2 are for parity bits, one for each byte.

If there was a parity error, then all the data bits might be clean, represented by 0 in all 8 words at $186. In this case, you will get error 71 instead of 70 from the memory test.

In the case of a parity error:

• one byte at $27C contains a number that corresponds to the row as follows:

   00 = row B when the problem board is in MEM 1, with MEM2 empty
   01 = row C when the problem board is in MEM 1
   02 = row D when the problem board is in MEM 1
   03 = row E when the problem board is in MEM 1

   04 = row B when the problem board is in MEM 1, with 512K in MEM2
   05 = row C when the problem board is in MEM 1

   06 = row D when the problem board is in MEM 1    07 = row E when the problem board is in MEM 1

   00 = row E when the problem board is in MEM 2, regardless of MEM1
   01 = row D when the problem board is in MEM 2
   02 = row C when the problem board is in MEM 2
   03 = row B when the problem board is in MEM 2

• one byte at $27D contains $09 or $14, which correspond directly to the board coordinate column of the bad parity chip, column 9 or 14. If this byte is zero, exit service mode by typing 7, then type apple-1 to run the self-test again; it seems that sometimes this is necessary to obtain the parity error data.
• long word $270 contains the logical address where the error occurred

Miscellaneous

• To enter service mode, type Apple-S after the memory error is reported
• To display the 16 words at $186 type: 1186 20<return>
• To display 8 words beginning at $27C type: 127C<return><return>
• If your memory board has a serious problem in Row B or E, then the Lisa might not work at all, since it needs some working memory to do the self-test. In this case, try moving the board to the other slot, and/or add a good board in the other slot. These will change the logical address of the bad row and may allow the Lisa to work well enough to perform the self-test.
• This information applies to the long test. There is a short test that is performed after a warm reset; I believe it consolidates all the bit errors into the one word at $186, ie. the row(s) are not decoded. To make sure you are getting the long test, first turn off the Lisa, and if you have batteries on your I/O board, turn off the switch (and check the FAQ about removing the batteries to prevent corrosion damage).
• This information is specific to the 512K Apple memory boards. If you have a different memory board you'll still get the error results, but mapping them to a physical chip is not addressed here.

Caution!

As some of this was determined by observation, and some by interpretation of the ROM listing, it would be good to have further independent confirmation... please report your own experience!

James

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Received on 2015-07-15 16:55:54